Semiconductor device and process for producing the same

ABSTRACT

When a semiconductor chip is mounted on a mount substrate by bonding bumps, bonding failure is caused by misalignment between the bumps.  
     Before a semiconductor chip having a plurality of bumps is mounted on a mount substrate ( 3 ) having a plurality of bumps ( 4 ) by flip chip bonding, a resist layer ( 5 ) having a thickness larger than that of the bumps ( 4 ) is formed on the mount substrate ( 3 ) with the bumps. By patterning the resist layer ( 5 ), projecting guides ( 5 A) of semicircular cross section are formed on the mount substrate ( 3 ) so as to protrude near the bumps ( 4 ) and from a surface on which the bumps ( 4 ) are provided, and to have guide faces (curved faces) pointing toward the bumps ( 4 ).

TECHNICAL FIELD

The present invention relates to a semiconductor-device productionmethod suitably used to mount a semiconductor chip on a mount substrateby bonding bumps, and to a semiconductor device produced by theproduction method.

BACKGROUND ART

At present, SIPs (System in Package), which are obtained by combining aplurality of LSI (Large Scale Integration) devices, such as a CPU(central processing unit) and a memory, into one package, are known as atype of package for a high-performance semiconductor device. Some SIPsadopt a package form in which a plurality of semiconductor chips aremounted on a common mount substrate (interposer). Some other SIPs adopt,as a mount substrate, a semiconductor chip having a diameter larger thanthat of a semiconductor chip to be mounted thereon (chip-on-chip SIPs).

As a method for mounting a semiconductor device by using such an SIPpackage form, flip chip bonding has recently been practically availablein order to increase the number of pins and to reduce the pitch. In flipchip bonding, bumps (metal projections) are formed on an electrode of asemiconductor chip, and the semiconductor chip is mounted on a mountsubstrate with the bumps disposed therebetween. Therefore, methods forforming and bonding the bumps are important.

In flip chip bonding, a semiconductor chip having a plurality of bumpsis sometimes mounted on a mount substrate similarly having a pluralityof bumps by a flip chip bonder. Semiconductor packages, such as SIPs,having such a mount structure are smaller and thinner and operate athigher speed with lower power consumption than normal packages using anorganic substrate. Furthermore, the SIPs are more advantageous, forexample, in cost, development TAT (Turn Around Time), and operationspeed than SOCs (System on Chip) which are obtained by integratingfunctions of a CPU and a memory in one high-performance chip (e.g., aDRAM/logic LSI chip). Therefore, the SIPs are widely applicable not onlyto small and light portable electronic devices, but also to allelectronic devices.

FIGS. 5A and 5B are views explaining a conventional semiconductor-deviceproduction method. First, as shown in FIG. 5A, bumps 2 are formed on anelectrode of a semiconductor chip 1, and bumps 4 are also formed on anelectrode of the corresponding mount substrate 3. The mount substrate 3is fixed on an unshown stage, and the semiconductor chip 1 is held bybeing sucked by an unshown vacuum chuck. The semiconductor chip 1 isthen placed above the stage so as to face the mount substrate 3. In thiscase, the bumps 2 of the semiconductor chip 1 and the bumps 4 of themount substrate 3 are aligned, for example, by image recognition usingbumps and patterns.

Subsequently, as shown in FIG. 5B, the bumps 2 of the semiconductor chip1 are brought into contact with the bumps 4 of the mount substrate 3 bymoving the vacuum chuck down. In this contact state, the semiconductorchip 1 is pressed downward by the vacuum chuck, and the bumps 2 and 4are bonded by being heated at a predetermined temperature.

Conventionally, alignment between the semiconductor chip 1 and the mountsubstrate 3 is checked by using, for example, a dummy sample so that thesemiconductor chip 1 and the mount substrate 3 are not misaligned.However, for example, when the bumps 2 and 4 are ball-shaped, a slightmisalignment greatly affects bondability of the bumps and the electricalcharacteristics of the semiconductor device. That is, in a case in whichthe centers of the bumps 2 on the semiconductor chip 1 are not alignedwith the centers (shown by one-dot chain lines) of the bumps 4 on themount substrate 3, as shown in FIG. 6A, when the bumps 2 and 4 arepressed in contact with each other, they slip away from each other, asshown in FIGS. 6B and 6C, and the misalignment between the semiconductorchip 1 and the mount substrate 3 increases.

Consequently, as shown in FIGS. 6D and 6E, the semiconductor chip 1 isdisplaced in the plane direction of the mount substrate 3 (in theright-left direction in the figure). Therefore, the positionalrelationship between the bumps 2 and 4 is seriously disrupted, and thebumps 2 and 4 are bonded in this state. As a result, at bump bondingportions between the semiconductor chip 1 and the mount substrate 3, theresistance increases because of reduction of the contact area. In somecases, open failure or shortcircuit failure may occur.

For example, Patent Document 1 (Japanese Unexamined Patent ApplicationPublication No. 2000-100868 (paragraphs 0022 to 0027, FIG. 3)) describes“a production method for a semiconductor device”. In the method, aninsulating resin layer is formed on a wiring-layer forming surface of awiring board, tapered openings are formed in the insulating resin layer,solder layers are formed inside the openings, ball-shaped metal bumpsare formed on an aluminum electrode terminal of a semiconductor chip,the metal bumps are heated in pressed contact with the solder layers inthe openings of the insulating resin layer so as to be put into themelted and softened solder layers, and bonding portions between themetal bumps of the semiconductor chip and wiring pads are coated withand sealed by the insulating resin layer by bringing the upper surfaceof the softened insulating resin layer into tight contact with anelectrode-terminal surface of the semiconductor chip.

However, in the production method described in the above Patent Document1, when a metal bump of the semiconductor chip is put in a solder layerin an opening of the insulating resin layer, since the insulating resinlayer is softened by heating, if the metal bump is relatively offsetfrom the opening, it is stuck in the insulating resin layer whileextending the opening. Therefore, the opening of the insulating resinlayer does not serve a function of preventing misalignment with themetal bump. Furthermore, in the production method described in the abovePatent Document 1, bumps are not bonded in contact with each other.Accordingly, the production method described in the above PatentDocument 1 cannot solve the problem to be solved by the presentinvention, that is, bonding failure caused by the misalignment betweenthe bumps 2 and 4 when the semiconductor chip 1 is mounted on the mountsubstrate 3 by flip chip bonding, as described above.

DISCLOSURE OF INVENTION

In a semiconductor-device production method according to the presentinvention, before a semiconductor chip having a plurality of bumps ismounted on a mount substrate having a plurality of bumps by flip chipbonding, projecting guides are formed on at least one of thesemiconductor chip and the mount substrate so as to protrude near thebumps and from a surface on which the bumps are provided and to haveguide faces pointing toward the bumps.

In the above semiconductor-device production method, when thesemiconductor chip is mounted on the mount substrate, for example,projecting guides are formed on the mount substrate beforehand. Evenwhen the bumps are slightly misaligned, the bumps of the semiconductorchip touch the guide faces of the projecting guides during bump bonding.The misalignment between the bumps is corrected by applying pressure inthis state.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an explanatory view showing a specific example of asemiconductor-device production method according to an embodiment of thepresent invention (No. 1).

FIGS. 2A to 2C are explanatory views showing the specific example of thesemiconductor-device production method according to the embodiment ofthe present invention (No. 2).

FIGS. 3A and 3B are explanatory views showing the specific example ofthe semiconductor-device production method according to the embodimentof the present invention (No. 3).

FIGS. 4A and 4B are views showing another example of a cross-sectionalshape of a projecting guide.

FIGS. 5A and 5B are explanatory views showing a conventionalsemiconductor-device production method.

FIGS. 6A to 6E are explanatory views showing a problem of theconventional method.

BEST MODE FOR CARRYING OUT THE INVENTION

An embodiment of the present invention will be described in detail belowwith reference to the drawings.

In a semiconductor-device production method according to the presentinvention, flip chip bonding for electrically connecting electrodes of asemiconductor chip and a mount substrate by bonding bumps is adopted tomount the semiconductor chip on the mount substrate. A specificprocedure of the method will be described below.

FIGS. 1 to 3B are explanatory views showing a specific example of asemiconductor-device production method according to an embodiment of thepresent invention. In the description of this embodiment, componentssimilar to those of the above-described conventional art are denoted bythe same reference numerals.

First, as shown in FIG. 1(A), a plurality of bumps 4 are formed on achip mount surface of a mount substrate 3 on which a semiconductor chipis to be mounted. Each of the bumps 4 is a metal bump made of a metalthat is not melted at a heating temperature during bump bonding, forexample, solder, and is formed like a ball on an electrode pad providedon the chip mount surface of the mount substrate 3. While bumps aretypically formed by plating a wafer, they may be formed by, for example,dipping, or reflowing after plating.

Next, a resist layer 5 is formed by coating the entire chip mountsurface of the mount substrate 3 with a resist, as shown in FIG. 1(B).As the resist material, a material that becomes harder than the bumps atthe heating temperature during bump bonding that will be describedlater, for example, a thermosetting resin such as epoxy resin or phenolresin. The coating thickness of the resist is adjusted so that thethickness of the resist layer 5 relative to the chip mount surface ofthe mount substrate 3 is larger than the height of the bumps 4 in afinished state after the resin is set. More preferably, the coatingthickness of the resist is adjusted so that the thickness of the resistlayer 5 is equal to or smaller than a prescribed gap between an unshownsemiconductor chip and the mount substrate 3 in a finished state afterthe resin is set. The thickness of the resist layer 5 described hereincorresponds to the height of projecting guides 5A that will be describedlater.

Subsequently, projecting guides 5A that are L-shaped (hook-shaped) inplan view are formed near the bumps 4 provided at four corners on theoutermost periphery by patterning the resist layer 5 on the mountsubstrate 3 into a desired shape, as shown in FIGS. 1(C) and 1(D).Patterning of the resist layer 5 is performed by first exposing theresist layer 5 by ultraviolet radiation using an unshown photomask,removing an unnecessary resist material by development, and thenthermally setting a resist material remaining on the mount substrate 3.When the projecting guides 5A obtained by this patterning is rectangularin cross section, they cannot serve a desired guide function. Therefore,the projecting guides 5A are shaped into a desired form, for example, bysputtering. As an example, the projecting guides 5A are shaped to besubstantially semicircular in cross section.

Consequently, the projecting guides 5A are formed on the chip mountsurface of the mount substrate 3 to protrude from the surface on whichthe bumps 4 are provided. Since the projecting guides 5A are shaped tobe substantially semicircular in cross section, as described above,curved faces pointing toward the bumps 4 serve as guide faces providedalong oblique lines (not shown) at an obtuse angle to the bump formingsurface of the mount substrate 3 (substantially the same as the chipmount surface). The guide faces serve as positioning guide faces thatallow bumps 2 of a semiconductor chip 1, which will be described later,to be reliably bonded to the bumps 4 of the mount substrate 3 when thebumps are bonded (bump bonding).

When forming the projecting guides 5A having such guide faces, theheight of the projecting guides 5A is larger than the height of thebumps 4 because the coating thickness of the resist is adjusted in theabove process before patterning so that the thickness of the resistlayer 5, from which the projecting guides 5A are made, is larger thanthe height of the bumps 4 in a finished state after resin setting.

Subsequently, as shown in FIG. 2A, a semiconductor chip 1 on which bumps2 are formed beforehand is sucked and held face down by a vacuum chuck6, and the mount substrate 3 on which the projecting guides 5A areformed, as described above, is fixed onto a stage 7 of a flip chipbonder. Prior to fixing the mount substrate 3 on the stage 7, theposition of the stage 7 is adjusted (coarse adjustment) by using a dummysample. After the mount substrate 3 is placed on the stage 7, thesemiconductor chip 1 held by the vacuum chuck 6 is placed above thestage 7 so as to face the mount substrate 3, and relative positioning(fine adjustment) of the semiconductor chip 1 and the mount substrate 3is performed in this state by an image recognition system of the flipchip bonder. The positioning may be performed by horizontally moving thestage 7 or horizontally moving the vacuum chuck 6.

Next, as shown in FIG. 2B, sealing underfill 8 is applied onto the chipmount surface of the mount substrate 3 by a dispenser or the like. Anapplication region of the underfill 8 is limited to a region surroundingthe bumps 4 provided on the outermost periphery of the chip mountsurface of the mount substrate 3. In this case, instead of the underfill8, an adhesive film, such as an ACF (Anisotropic Conductive Film) or anNCF (Non-Conductive Film), may be stuck beforehand on the chip mountsurface of the mount substrate 3.

Subsequently, as shown in FIG. 2C, the bumps 2 on the semiconductor chip1 are brought into contact with the bumps 4 on the mount substrate 3 bymoving the vacuum chuck 6 down. In this case, the underfill 8 applied onthe mount substrate 3 is pressed by the semiconductor chip 1, and isthereby filled between the semiconductor chip 1 and the mount substrate3.

Even when the bumps 2 and 4 are slightly misaligned when being broughtinto contact with each other, the bumps 2 of the semiconductor chip 1touch the inner curved faces (guide faces) of the projecting guides 5A,as shown in FIG. 3A, and the vacuum chuck 6 presses the semiconductorchip 1 in the direction of the arrow in this state. For this reason, thebumps 2 slip down on the curved faces of the projecting guides 5A, andthe semiconductor chip 1 held by the vacuum chuck 6 is thereby shiftedto the left (in the direction of the arrow in the figure), that is, in adirection such as to reduce misalignment between the bumps 2 and 4 (adirection such as to correct the misalignment), as shown in FIG. 3B.

As a result, when the semiconductor chip 1 is mounted on the mountsubstrate 3, it is possible to effectively correct misalignment betweenthe bumps 2 and 4, and to enhance stability of bump bonding. Moreover,since alignment adjustment using a dummy sample does not require a highaccuracy, the adjustment time can be substantially reduced, andproductivity can be enhanced. Incidentally, in a semiconductor deviceobtained by the above-described production method, the projecting guides5A are formed on the mount substrate 3.

By setting the height of the projecting guides 5A to be equal to theprescribed gap between the semiconductor chip 1 and the mount substrate3, the projecting guides 5A can function as spacers between thesemiconductor chip 1 and the mount substrate 3. Consequently, the gapbetween the semiconductor chip 1 and the mount substrate 3 can beprecisely controlled by using the height of the projecting guides 5A asa parameter.

While the projecting guides 5A are respectively provided near the bumps4 at the four corners on the outermost periphery of the mount substrate3 in the above embodiment, the layout and number of the projectingguides 5A may be changed arbitrarily. Projecting guides 5A similar tothe above may be formed on the semiconductor chip 1, or projectingguides 5A similar to the above may be formed on both the semiconductorchip 1 and the mount substrate 3. When the projecting guides 5A areformed on both the semiconductor chip 1 and the mount substrate 3, it isnecessary to give consideration so that the projecting guides 5A do notinterfere with each other during bump bonding.

While the cross section of the projecting guides 5A is semicircular inthe above embodiment, for example, it may be triangular, as shown inFIG. 4A, or may be trapezoidal, as shown in FIG. 4B. When the projectingguides 5A have a cross-sectional shape shown in FIG. 4A or 4B, inclinedfaces provided along an oblique line at an obtuse angle to the bumpforming surface are formed to function as guide faces during bumpbonding.

INDUSTRIAL APPLICABILITY

As described above, according to the present invention, when asemiconductor chip having a plurality of bumps is mounted on a mountsubstrate having a plurality of bumps by flip-chip bonding, projectingguides are formed beforehand on at least one of the semiconductor chipand the mount substrate so as to protrude near the bumps and from asurface on which the bumps are provided, and to have guide facespointing toward the bumps. Therefore, during bump bonding, misalignmentbetween the bumps can be corrected by the guide faces of the projectingguides, and a stable bonding state can be thereby obtained.

1. A semiconductor-device production method wherein, before asemiconductor chip having a plurality of bumps is mounted on a mountsubstrate having a plurality of bumps by flip chip bonding, projectingguides are formed on at least one of the semiconductor chip and themount substrate so as to protrude near the bumps and from a surface onwhich the bumps are provided, and to have guide faces pointing towardthe bumps.
 2. The semiconductor-device production method according toclaim 1, wherein the guide faces of the projecting guides are inclinedfaces or curved faces disposed along oblique lines at an obtuse angle tothe surface on which the bumps are provided.
 3. The semiconductor-deviceproduction method according to claim 1, wherein the projecting guidesare provided near the bumps disposed at four corners on the outermostperiphery of the semiconductor chip or the mount substrate.
 4. Thesemiconductor-device production method according to claim 1, wherein theprojecting guides are made of a material that becomes harder than thebumps at a heating temperature during bump bonding.
 5. Thesemiconductor-device production method according to claim 1, wherein theprojecting guides are provided near the bumps so as to be substantiallyL-shaped in plan view.
 6. The semiconductor-device production methodaccording to claim 1, wherein the projecting guides are formed so thatthe height thereof is larger than the height of the bumps disposed nearthe projecting guides.
 7. The semiconductor-device production methodaccording to claim 6, wherein the projecting guides are formed so thatthe height thereof is substantially equal to or smaller than aprescribed gap between the semiconductor chip and the mount substrate.8. A semiconductor device wherein a semiconductor chip having aplurality of bumps is mounted on a mount substrate having a plurality ofbumps by flip chip bonding, and wherein projecting guides are providedon at least one of the semiconductor chip and the mount substrate so asto protrude near the bumps and from a surface on which the bumps areprovided, and to have guide faces pointing toward the bumps.